Generated by SSM 2.2.0 (June 16, 2015) at Tue Jun 16 17:19:15 CEST 2015

Topics

add, ajs, and, annote, bra, brf, brt, bsr, code, div, eq, False, ge, gt, halt, heap, heappointer, help, HP, instruction, jsr, labels, lda, ldaa, ldc, ldh, ldl, ldla, ldma, ldmh, ldml, ldms, ldr, ldrr, lds, ldsa, le, link, lt, markpointer, memory, mod, MP, mul, ne, neg, nop, not, or, PC, programcounter, registers, ret, return, RR, SP, sta, stack, stackpointer, sth, stl, stma, stmh, stml, stms, str, sts, sub, swp, swpr, swprr, syntax, trap, True, unlink, xor

Semantics: add

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
add0211

Description

Addition. Replaces 2 top stack values with the addition of those values.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_post] = M_pre[SP_pre - 1] + M_pre[SP_pre]

Example

ldl 2 ; increment local var
ldc 1
add
stl 2

Semantics: ajs

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ajs1instruction dependent00x64

Description

Adjust Stack. Adjusts the stackpointer with fixed amount.

Pre and Post State

SP_post = SP_pre + M_post[PC_pre+1]

Example

ajs -2 ;lower stack by 2

Semantics: and

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
and0212

Description

And. Replaces 2 top stack values with the bitwise and of those values.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_post] = M_pre[SP_pre - 1] & M_pre[SP_pre]

Example

ldc 0xFF00 ; variant of ldc 0xF000
ldc 0xF0F0
and

Semantics: annote

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
annote5000xff

Description

Annotate. A meta instruction (not producing code), annotating the stack display in the user interface with text and color. Annote takes 5 arguments, (1) a register name, (2) a low offset w.r.t. the register (used as starting point for annotating), (3) a high offset, (4) a color, (5) text. Color can be one of {black, blue, cyan, darkGray, gray, green, lightGray, magenta, orange, pink, red, yellow}. Text including spaces need to be enclosed in double quotes. The annote instruction is tied to the preceding (non-meta) instruction and will be performed immediately after the execution of that instruction.

Pre and Post State

Example

annote SP -1 0 red "Pushed constants" ; annote top 2 stack values

Semantics: bra

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
bra1000x68

Description

Branch Allways. Jumps to the destination. Replaces the PC with the destination address.

Pre and Post State

PC_post = PC_pre + M_pre[PC_pre + 1] + 2

Example

bra main
subroutine ldc 1
ldc 2
add
str RR
ret
main: bsr subroutine
ldr RR
...

Semantics: brf

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
brf1100x6c

Description

Branch on False. If a False value is on top of the stack, jump to the destination.

Pre and Post State

SP_post = SP_pre - 1
PC_post = PC_pre + M_pre[PC_pre + 1] + 2 (if false on top of the stack)

Example

ldc 2
ldc 3
eq
brf FalseAction

Semantics: brt

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
brt1100x6d

Description

Branch on True. If a True value is on top of the stack, jump to the destination.

Pre and Post State

SP_post = SP_pre - 1
PC_post = PC_pre + M_pre[PC_pre + 1] + 2 (if true on top of the stack)

Example

Semantics: bsr

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
bsr1010x70

Description

Branch to subroutine. Pushes the PC on the stack and jumps to the subroutine.

Pre and Post State

SP_post = SP_pre + 1
M_post[SP_post] = PC_pre + 2
PC_post = PC_pre + M_pre[PC_pre + 1] + 2

Example

bra main
subroutine ldc 1
ldc 2
add
str RR
ret
main: bsr subroutine
ldr RR
...

General: code

Code is the part of memory used to store instructions. It starts at address 0.

Semantics: div

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
div0214

Description

Division. Replaces 2 top stack values with the division of those values.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_post] = M_pre[SP_pre - 1] / M_pre[SP_pre]

Example

ldl -1 ; divide and leave on stack
ldc 3
div

Semantics: eq

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
eq0210xe

Description

Test for equal. Replaces 2 top stack values with boolean result of the test. False is encoded as 0, True as 1. Used in combination with brf. This is a variant of cmp combined with beq.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_post] = M_pre[SP_pre - 1] == M_pre[SP_pre]

Example

ldc 2
ldc 3
eq
brf FalseAction

General: False

Value False is encoded by a 0.

Semantics: ge

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ge0210x13

Description

Test for greater or equal. Replaces 2 top stack values with boolean result of the test. False is encoded as 0, True as 1. Used in combination with brf. This is a variant of cmp combined with bge.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_post] = M_pre[SP_pre - 1] >= M_pre[SP_pre]

Example

ldc 2
ldc 3
ge
brf FalseAction

Semantics: gt

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
gt0210x11

Description

Test for greater then. Replaces 2 top stack values with boolean result of the test. False is encoded as 0, True as 1. Used in combination with brf. This is a variant of cmp combined with bgt.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_post] = M_pre[SP_pre - 1] > M_pre[SP_pre]

Example

ldc 2
ldc 3
gt
brf FalseAction

Semantics: halt

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
halt0000x74

Description

Halt execution. Machine stops executing instructions.

Pre and Post State

Example

halt

General: heap

Heap is the part of memory used to store composite values. The heap is located after the stack and grows from lower addresses to higher ones.

General: heappointer

The heappointer (HP) is used to remember the next free address of the heap. After every store to the heap, the heappointer is incremented with the size of stored values.

General: help

The Simple Stack Machine Interpreter executes instructions for a hypothetical (and thus simple) machine. See memory, registers, syntax, instruction as starting points for help.

General: HP

The heappointer (HP) is used to remember the next free address of the heap. After every store to the heap, the heappointer is incremented with the size of stored values.

General: instruction

An instruction is an encoding of some operation, executed in the machine. A set of instructions stored in memory is called the code. Some instructions have inline operands, that is, after their location in the code an extra operand is stored, a constant, e.g. in "ldc 1". In pre/post conditions this location is indicated by M[PCpre+1] since it can be found on that location. The behavior of an instruction is both informally described as well as using pre/postcondifitions.

Semantics: jsr

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
jsr0110x78

Description

Jump to subroutine. Pops a destination from the stack, pushes the PC on the stack and jumps to the destination.

Pre and Post State

SP_post = SP_pre
PC_post = M_pre[SP_pre]
M_post[SP_post] = PC_pre + 1

Example

bra main
subroutine ldc 1
ldc 2
add
str RR
ret
main: ldc subroutine
jsr
ldr RR
...

General: labels

A label is an identifier indicating a position in the code. When loading, the code location of a label is calculated (called resolution). This is done in the user interface of the program and after loading labels are not kept consistent (when adding new instructions for example).

Semantics: lda

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
lda1110x7c

Description

Load via Address. Dereferencing. Pushes the value pointed to by the value at the top of the stack. The pointer value is offset by a constant offset.

Pre and Post State

SP_post = SP_pre
M_post[SP_post] = M_pre[M_pre[SP_pre] + M_pre[PC_pre+1]]

Example

ldla -2 ; a different way of doing ldl -2
lda 0

Semantics: ldaa

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ldaa1110x80

Description

Load Address of Address. Pushes the address of a value relative to the address on top of the stack. This instruction effectively adds a constant to the top of the stack.

Pre and Post State

SP_post = SP_pre + 1
M_post[SP_post] = M_pre[SP_pre] + M_pre[PC_pre+1]

Example

ldaa -2

Semantics: ldc

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ldc1010x84

Description

Load Constant. Pushes the inline constant on the stack.

Pre and Post State

SP_post = SP_pre + 1
M_post[SP_post] = M_pre[PC_pre+1]

Example

ldl 2 ; increment local var
ldc 1
add
stl 2

Semantics: ldh

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ldh1110xd0

Description

Load from Heap. Pushes a value pointed to by the value at the top of the stack. The pointer value is offset by a constant offset.

Pre and Post State

Example

ldc 5
sth
ldh 0

Semantics: ldl

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ldl1010x88

Description

Load Local. Pushes a value relative to the markpointer.

Pre and Post State

SP_post = SP_pre + 1
M_post[SP_post] = M_pre[MP_pre + M_pre[PC_pre+1]]

Example

ldl -1 ; divide and leave on stack
ldc 3
div

Semantics: ldla

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ldla1010x8c

Description

Load Local Address. Pushes the address of a value relative to the markpointer.

Pre and Post State

SP_post = SP_pre + 1
M_post[SP_post] = MP_pre + M_pre[PC_pre+1]

Example

ldla -2 ; update local using its address
ldc 5
sta 0

Semantics: ldma

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ldma21instruction dependent0x7e

Description

Load Multiple via Address. Pushes values relative to by the value at the top of the stack. Same as single load variant but second inline parameter is size.

Pre and Post State

displ = M_pre[PC_pre + 1]
size = M_pre[PC_pre + 2]
SP_post = SP_pre + size - 1
M_post[SP_post - size + 1 .. SP_post] = M_pre[M_pre[SP_pre] + displ .. M_pre[SP_pre] + displ + size - 1]

Example

none

Semantics: ldmh

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ldmh21instruction dependent0xd4

Description

Load Multiple from Heap. Pushes values pointed to by the value at the top of the stack. The pointer value is offset by a constant offset. Same as single load variant but the second inline parameter is size.

Pre and Post State

Example

ldc 1
ldc 2
ldc 3
stmh 3
ldmh 0 3

Semantics: ldml

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ldml20instruction dependent0x8a

Description

Load Multiple Local. Pushes values relative to the markpointer. Same as single load variant but second inline parameter is size.

Pre and Post State

displ = M_pre[PC_pre + 1]
size = M_pre[PC_pre + 2]
SP_post = SP_pre + size
M_post[SP_post - size + 1 .. SP_post] = M_pre[MP_pre + displ .. MP_pre + displ + size - 1]

Example

ldml -1 2 ; divide and leave on stack
ldc 3
div

Semantics: ldms

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ldms20instruction dependent0x9a

Description

Load Multiple from Stack. Pushes values relative to the top of the stack. Same as single load variant but second inline parameter is size.

Pre and Post State

displ = M_pre[PC_pre + 1]
size = M_pre[PC_pre + 2]
SP_post = SP_pre + size
M_post[SP_post - size + 1 .. SP_post] = M_pre[SP_pre + displ .. SP_pre + displ + size - 1]

Example

ldms -1 2; multiply and leave on stack
mul

Semantics: ldr

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ldr1010x90

Description

Load Register. Pushes a value from a register. Registers 0, 1, 2 and 3 are called PC (programcounter), SP (stackpointer), MP (markpointer) and RR (return register) respectively.

Pre and Post State

SP_post = SP_pre + 1
M_post[SP_post] = REG_pre[ M_pre[PC_pre+1] ]

Example

ldr RR ; decrement register
ldc 1
sub
str RR

Semantics: ldrr

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ldrr2000x94

Description

Load Register from Register. Copy the content of the second register to the first. Does not affect the stack.

Pre and Post State

REG_post[ M_pre[PC_pre+1] ] = REG_pre[ M_pre[PC_pre+2] ]

Example

ldrr SP MP ; SP <- MP

Semantics: lds

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
lds1010x98

Description

Load from Stack. Pushes a value relative to the top of the stack.

Pre and Post State

SP_post = SP_pre + 1
M_post[SP_post] = M_pre[SP_pre + M_pre[PC_pre+1]]

Example

lds -1 ; multiply and leave on stack
ldc 2
mul

Semantics: ldsa

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ldsa1010x9c

Description

Load Stack Address. Pushes the address of a value relative to the stackpointer.

Pre and Post State

SP_post = SP_pre + 1
M_post[SP_post] = SP_pre + M_pre[PC_pre+1]

Example

ldsa -2 ; update value on stack using its address
ldc 5
sta 0

Semantics: le

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
le0210x12

Description

Test for less or equal. Replaces 2 top stack values with boolean result of the test. False is encoded as 0, True as 1. Used in combination with brf. This is a variant of cmp combined with ble.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_post] = M_pre[SP_pre - 1] <= M_pre[SP_pre]

Example

ldc 2
ldc 3
lr
brf FalseAction

Semantics: link

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
link10instruction dependent0xa0

Description

Reserve memory for locals. Convenience instruction combining the push of MP and the adjustment of the SP.

Pre and Post State

MP_post = SP_pre + 1
M_post[MP_post] = MP_pre
SP_post = MP_post + M_pre[PC_pre+1]

Example

bra main
subroutine link 2 ; reserve for 2 locals
ldc 1
ldc 2
add
stl 1 ; store in 2nd local
ldl 1
str RR
unlink
ret
main: bsr subroutine
ldr RR
...

Semantics: lt

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
lt0210x10

Description

Test for less then. Replaces 2 top stack values with boolean result of the test. False is encoded as 0, True as 1. Used in combination with brf. This is a variant of cmp combined with blt.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_post] = M_pre[SP_pre - 1] < M_pre[SP_pre]

Example

ldc 2
ldc 3
lt
brf FalseAction

General: markpointer

The markpointer (MP) is used to access local variables, allocated on the stack. Each variable is accessed using a displacement relative to the MP.

General: memory

Memory stores words. A word is an 32 bits integer. Currently only a limited amount of memory words is reserver (2000), this is rather arbitrary, in the future memory size will adapt automatically to the amount needed.

Semantics: mod

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
mod0217

Description

Division. Replaces 2 top stack values with the modulo of those values.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_post] = M_pre[SP_pre - 1] % M_pre[SP_pre]

Example

ldl -2 ; x = x % y
ldl -3
mod
stl -2

General: MP

The markpointer (MP) is used to access local variables, allocated on the stack. Each variable is accessed using a displacement relative to the MP.

Semantics: mul

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
mul0218

Description

Multiplication. Replaces 2 top stack values with the multiplication of those values.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_post] = M_pre[SP_pre - 1] * M_pre[SP_pre]

Example

No info

Semantics: ne

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ne0210xf

Description

Test for not equal. Replaces 2 top stack values with boolean result of the test. False is encoded as 0, True as 1. Used in combination with brf. This is a variant of cmp combined with bne.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_post] = M_pre[SP_pre - 1] != M_pre[SP_pre]

Example

ldc 2
ldc 3
ne
brf FalseAction

Semantics: neg

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
neg0110x20

Description

Negation. Replaces top stack values with the (integer) negative of the value.

Pre and Post State

SP_post = SP_pre
M_post[SP_post] = - M_pre[SP_pre]

Example

ldc 1 ; variant of ldc -1
neg

Semantics: nop

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
nop0000xa4

Description

No operation. Well, guess what...

Pre and Post State

Example

nop

Semantics: not

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
not0110x21

Description

Not. Replaces top stack values with the bitwise complement of the value.

Pre and Post State

SP_post = SP_pre
M_post[SP_post] = ~ M_pre[SP_pre]

Example

ldc 0x0000FFFF ; variant of ldc 0xFFFF0000
not

Semantics: or

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
or0219

Description

Or. Replaces 2 top stack values with the bitwise or of those values.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_post] = M_pre[SP_pre - 1] | M_pre[SP_pre]

Example

ldc 0xFF00 ; variant of ldc 0xFFFF
ldc 0xF0F0
or

General: PC

The programcounter (PC) is used to remember what the current next instruction is. It contains the address (i.e. points to) the location of the next instruction. The machine fetches an instruction from the location pointed to by the PC. After each fetch it is automatically updated to point to the next instruction.

General: programcounter

The programcounter (PC) is used to remember what the current next instruction is. It contains the address (i.e. points to) the location of the next instruction. The machine fetches an instruction from the location pointed to by the PC. After each fetch it is automatically updated to point to the next instruction.

General: registers

Eight registers are available, some of which have a specific purpose. A register is private location in a processor, often faster accessible then external memory. Currently the programcounter (PC), stackpointer (SP), markpointer (MP), heappointer (HP), and return register (RR) as well as freely usable scratch registers are available, respectively identified by numbers 0..7. Registers are identified by the name R, where is the register number. Register with a specific purpose are also named with the name indicating their purpose.

Semantics: ret

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
ret0100xa8

Description

Return from subroutine. Pops a previously pushed PC from the stack and jumps to it.

Pre and Post State

SP_post = SP_pre - 1
PC_post = M_pre[SP_pre]

Example

bra main
subroutine ldc 1
ldc 2
add
str RR
ret
main: bsr subroutine
ldr RR
...

General: return

register=@RR

General: RR

The return register (RR) is used to return a value without placing it on a stack. Strictly seen this is not necessary but a convenience, since values also can be passed via the stack.

General: SP

The stackpointer (SP) is used to push and pop values for usage in expression evaluation. The stack is also used to store variables. These are often accessed via the MP.

Semantics: sta

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
sta1200xac

Description

Store via Address. Pops 2 values from the stack and stores the second popped value in the location pointed to by the first. The pointer value is offset by a constant offset.

Pre and Post State

SP_post = SP_pre - 2
M_post[M_pre[SP_pre] + M_pre[PC_pre+1]] = M_pre[SP_pre-1]

Example

ldla -2 ; update local using its address
ldc 5
sta 0

General: stack

Stack is the part of memory used to store values needed for evaluating expressions. The stack is located after the code and grows from lower addresses to higher ones.

General: stackpointer

The stackpointer (SP) is used to push and pop values for usage in expression evaluation. The stack is also used to store variables. These are often accessed via the MP.

Semantics: sth

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
sth0110xd6

Description

Store into Heap. Pops 1 value from the stack and stores it into the heap. Pushes the heap address of that value on the stack.

Pre and Post State

Example

ldc 5
sth

Semantics: stl

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
stl1100xb0

Description

Store Local. Pops a value from the stack and stores it in a location relative to the markpointer.

Pre and Post State

SP_post = SP_pre - 1
M_post[MP_pre + M_pre[PC_pre+1]] = M_pre[SP_pre]

Example

ldl 2 ; increment local var
ldc 1
add
stl 2

Semantics: stma

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
stma2instruction dependent00xae

Description

Store Multiple via Address. Pops values from the stack and stores it in a location relative to the value at the top of the stack. Same as single store variant but second inline parameter is size.

Pre and Post State

displ = M_pre[PC_pre + 1]
size = M_pre[PC_pre + 2]
SP_post = SP_pre - size - 1
M_post[M_pre[SP_pre] + displ .. M_pre[SP_pre] + displ + size - 1] = M_pre[SP_post + 1 .. SP_post + size]

Example

none

Semantics: stmh

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
stmh1instruction dependent10xd8

Description

Store Multiple into Heap. Pops values from the stack and stores it into the heap, retaining the order of the values. Same as single store variant but the inline parameter is size. Pushes the heap address of the last value on the stack.

Pre and Post State

Example

ldc 1
ldc 2
ldc 3
stmh 3

Semantics: stml

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
stml2instruction dependent00xb2

Description

Store Multiple Local. Pops values from the stack and stores it in a location relative to the markpointer. Same as single store variant but second inline parameter is size.

Pre and Post State

displ = M_pre[PC_pre + 1]
size = M_pre[PC_pre + 2]
SP_post = SP_pre - size
M_post[MP_pre + displ .. MP_pre + displ + size - 1] = M_pre[SP_post + 1 .. SP_post + size]

Example

ldl 2 ; increment local var
ldc 1
add
stml 2 1 ; equivalent to stl 2

Semantics: stms

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
stms2instruction dependent00xba

Description

Store Multiple into Stack. Pops values from the stack and stores it in a location relative to the top of the stack. Same as single store variant but second inline parameter is size.

Pre and Post State

displ = M_pre[PC_pre + 1]
size = M_pre[PC_pre + 2]
SP_post = SP_pre - size
M_post[SP_pre + displ .. SP_pre + displ + size - 1] = M_pre[SP_post + 1 .. SP_post + size]

Example

lds -1 ; substract and store in stack
ldc 2
sub
stms -2 1 ; equivalent to sts -2

Semantics: str

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
str1100xb4

Description

Store Register. Pops a value from the stack and stores it in the specified register. See also ldr.

Pre and Post State

SP_post = SP_pre - 1
REG_post[ M_pre[PC_pre+1] ] = M_pre[SP_pre]

Example

ldr RR ; decrement register
ldc 1
sub
str RR

Semantics: sts

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
sts1100xb8

Description

Store into Stack. Pops a value from the stack and stores it in a location relative to the top of the stack.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_pre + M_pre[PC_pre+1]] = M_pre[SP_pre]

Example

lds -1 ; substract and store in stack
ldc 2
sub
sts -2

Semantics: sub

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
sub0210xc

Description

Substraction. Replaces 2 top stack values with the subtraction of those values.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_post] = M_pre[SP_pre - 1] - M_pre[SP_pre]

Example

No info

Semantics: swp

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
swp0220xbc

Description

Swap values. Swaps the 2 topmost values on the stack.

Pre and Post State

SP_post = SP_pre
M_post[SP_post] = M_pre[SP_pre-1]
M_post[SP_post-1] = M_pre[SP_pre]

Example

ldc 1 ; variant for ldc 2 followed by ldc 1
ldc 2
swp

Semantics: swpr

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
swpr1110xc0

Description

Swap Register. Swaps the content of a register with the top of the stack.

Pre and Post State

SP_post = SP_pre
M_post[SP_post] = REG_pre[ M_pre[PC_pre+1] ]
REG_post[ M_pre[PC_pre+1] ] = M_pre[SP_pre]

Example

Semantics: swprr

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
swprr2000xc4

Description

Swap 2 Registers. Swaps the content of a register with another register.

Pre and Post State

REG_post[ M_pre[PC_pre+1] ] = REG_pre[ M_pre[PC_pre+2] ]
REG_post[ M_pre[PC_pre+2] ] = REG_pre[ M_pre[PC_pre+1] ]

Example

swprr MP R7 ; swap MP with scratch register

General: syntax

Syntax of instructions (as loaded from file) is: (label:)? (instr arg*)?. In other words, an (optional) instruction preceded by an (optional) label and followed by an argument if required. Comment may start with ";" or "//" (Java/C++ style) and ends at the end of the line. This characters are interpreted as start of comment. A label may be used as an argument. Example: "l1: beq l1 ; comment".

Semantics: trap

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
trap1instruction dependentinstruction dependent0xc8

Description

Trap to environment function. Trap invokes a systemcall determined by its argument. Currently, trap supports the following system calls:
  1. Pop the topmost element from the stack and print it as an integer.
  2. Pop the topmost element from the stack and print it as a unicode character.
  3. Ask the user for an integer input and push it on the stack.
  4. Ask the user for a unicode character input and push it on the stack.
  5. Ask the user for a sequence of unicode characters input and push the characters on the stack terminated by a null-character.
  6. Pop a null-terminated file name from the stack, open the file for reading and push a file pointer on the stack.
  7. Pop a null-terminated file name from the stack, open the file for writing and push a file pointer on the stack.
  8. Pop a file pointer from the stack, read a character from the file pointed to by the file pointer and push the character on the stack.
  9. Pop a character and a file pointer from the stack, write the character to the file pointed to by the file pointer.
  10. Pop a file pointer from the stack and close the corresponding file.

Pre and Post State

Example

ldc 5
trap 0 ; print 5 on output

General: True

Value True is encoded by a -1 (all 1 bit pattern 0xFFFFFFFF). However, when testing in the context of a BRF instruction takes place, anything else than 0 is considered to be True.

Semantics: unlink

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
unlink0instruction dependent00xcc

Description

Free memory for locals. Convenience instruction combining the push of MP and the adjustment of the SP.

Pre and Post State

MP_post = M_pre[MP_pre]
SP_post = MP_pre - 1

Example

bra main
subroutine link 2 ; reserve for 2 locals
ldc 1
ldc 2
add
stl 1 ; store in 2nd local
ldl 1
str RR
unlink
ret
main: bsr subroutine
ldr RR
...

Semantics: xor

InstructionNr of inline OpndsNr of stack OpndsNr of stack ResultsInstr code (hex)
xor0210xd

Description

Exclusive Or. Replaces 2 top stack values with the bitwise exclusive or of those values.

Pre and Post State

SP_post = SP_pre - 1
M_post[SP_post] = M_pre[SP_pre - 1] ^ M_pre[SP_pre]

Example

ldc 0xFF00 ; variant of ldc 0x0FF0
ldc 0xF0F0
xor